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general description the aat2513 is a high efficiency dual synchronous step-down converter for applications where power efficiency, thermal performance and solution size are critical. input voltage ranges from 2.7v to 5.5v, making it ideal for systems powered by single-cell lithium-ion/polymer batteries. each converter is capable of 600ma output current and has its own enable pin. efficiency of the con- verters is optimized over full load range. total no load quiescent current is 60a, allowing high effi- ciency even under light load conditions. the integrated power switches are controlled by pulse width modulation (pwm) with a 1.7mhz typi- cal switching frequency at full load, which minimizes the size of external components. fixed frequency, low noise operation can be forced by a logic signal on the mode pin. furthermore, an external clock can be used to synchronize the switching frequency of both converters. a phase shift pin (ps) is available to operate the two converters 180 out of phase at heavy load to achieve low input ripple. the aat2513 is available in a pb-free, thermally enhanced 16-pin qfn33 package and is specified for operation over the -40c to +85c temperature range. features ?v in range: 2.7v to 5.5v ? output current: channel 1: 600ma channel 2: 600ma ? 96% efficient step-down converter ? low no load quiescent current 60a total for both converters ? integrated power switches ? 100% duty cycle ? 1.7mhz switching frequency ? optional fixed frequency or external sync ? logic selectable 180 phase shift between the two converters ? current limit protection ? automatic soft-start ? over-temperature protection ? qfn33-16 package ? -40c to +85c temperature range applications ? cellular phones / smart phones ? digital cameras ? handheld instruments ? micro hard disc drives ? microprocessor / dsp core / io power ? pdas and handheld computers aat2513 dual 600ma step-down converter with synchronization typical application 2513.2007.04.1.1 1 systempower ? input: 2.7v to 5.5v vin2 lx1 c in 1f c2 4.7f aat2513 2h l1 r1 r2 r3 r4 l2 lx2 fb1 fb2 vout2 2h c1 4.7f pgnd1 agnd vcc en1 en2 mode/sync ps pgnd2 vin1 vout1
pin descriptions pin configuration qfn33-16 (top view) pin # symbol function 1 ps phase shift pin. logic high enables the ps feature which forces the two converters to operate 180 out of phase when both are in forced pwm mode. 2 agnd analog ground. return the feedback resistive divider to this ground. see section on pcb layout guidelines and evaluation board layout diagram. 4, 3 fb1, fb2 feedback input pins. an external resistive divider ties to each and programs the respective output voltage to the desired value. 5, 16 vin1, vin2 input supply voltage pins. must be closely decoupled to the respective pgnd. 6, 15 n/c not connected 7, 14 lx1, lx2 output switching nodes that connect to the respective output inductor. 8, 13 pgnd1, pgnd2 main power ground return. connect to the input and output capacitor return. see section on pcb layout guidelines and evaluation board layout diagram. 10, 9 en1, en2 converter enable input pins. a logic high enables the converter channel. a logic low forces the channel into shutdown mode, reducing the channel supply current to less than 1a. this pin should not be left floating. when not actively controlled, this pin can be tied directly to vin and/or vcc. 11 vcc control circuit power supply. connect to the higher voltage of vin1 or vin2. 12 mode/sync logic low enables automatic light load mode for optimized efficiency throughout the entire load range. logic high forces low noise pwm operation under all operating conditions. connect to an external clock for synchronization (pwm only). ep exposed paddle (bottom). use properly sized vias for thermal coupling to the ground plane. see section on pcb layout guidelines. aat2513 dual 600ma step-down converter with synchronization 2 2513.2007.04.1.1 mode/sync vcc en1 vin2 ps a gnd fb2 1 2 3 4 n/c vin1 lx1 16 15 14 13 5 6 7 8 12 11 10 9 pgnd1 en2 pgnd2 lx2 n/c fb1
absolute maximum ratings 1 t a = 25c unless otherwise noted. thermal information symbol description value units ja thermal resistance 50 c/w p d maximum power dissipation 2 w symbol description value units vin1/2 input voltage -0.3 to 6.0 v gnd, pgnd1/2 ground pins -0.3 to +0.3 v en1/2, sync, maximum rating -0.3 to v cc + 0.3 v lx1/2, fb1/2, ps t j operating temperature range -40 to 150 c t s storage temperature range -65 to 150 c t lead maximum soldering temperature (at leads, 10 sec) 300 c aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 3 1. stresses above those listed in absolute maximum ratings may cause permanent damage to the device. functional operation at c ondi tions other than the operating conditions specified is not implied. only one absolute maximum rating should be applied at any one time.
electrical characteristics 1 v in = v cc = 3.6v, t a = -40c to +85c, unless noted otherwise. typical values are at t a = 25c. symbol description conditions min typ max units power supply v cc , input voltage 2.7 5.5 v v in1 , v in2 uvlo under-voltage lockout v cc rising 2.7 v v cc falling 2.35 i q quiescent current v en1 = v en2 = v cc , no load 60 120 a i shdn shutdown current en1 = en2 = gnd 1.0 a each converter v fb feedback voltage tolerance i out = 0 to 600ma, v in = 2.9 to 5.5v -3.0 -3.0 % i out = 0 to 450ma, v in = 2.7 to 5.5v v out output voltage range 0.6 v in v i lx leak lx reverse leakage current v in open, v lx = 5.5v, en = gnd 1.0 a (fixed) i lx leak lx leakage current v in = 5.5v, v lx = 0 to v in 1.0 a i fb feedback leakage v fb = 1.0v 0.2 a i lim p-channel current limit each converter 1.0 a r ds(on)h high side switch on resistance 0.45 r ds(on)l low side switch on resistance 0.40 v out / load regulation i load = 0 to 600 ma 0.002 %/ma v out /i out v out / line regulation v in = 2.7 to 5.5v, i load = 100 ma 0.125 %/v v out /v in v fb feedback threshold voltage no load, t a = 25c 0.591 0.600 0.609 v accuracy f osc oscillator frequency 1.7 mhz t s start-up time from enable to output regulation; 150 s both channels logic t sd over-temperature shutdown 140 c threshold t hys over-temperature shutdown 15 c hysteresis v il en, mode/sync, ps logic 0.6 v low threshold v ih en, mode/sync, ps logic 1.4 v high threshold i en , i mode/sync , logic input current v in = v fb = 5.5v -1.0 1.0 a i ps aat2513 dual 600ma step-down converter with synchronization 4 2513.2007.04.1.1 1. the aat2513 guaranteed to meet performance specifications over the 40c to +85c operating temperature range and is assured by design, characterization and correlation with statistical process controls.
electrical characteristics aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 5 efficiency vs. load (v out = 1.8v; l = 2.2h; ll mode) output current (ma) efficiency (%) 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 v in = 2.7v v in = 4.2v v in = 3.6v v in = 5.0v dc regulation (v out = 1.8v; l = 2.2h; ll mode) output current (ma) output error (%) -0.8 -1.0 -0.6 -0.4 -0.2 0.2 0.0 0.4 0.6 0.8 1.0 0.1 1 10 100 1000 v in = 5.0v v in = 4.2v v in = 3.3v efficiency vs. load (v out = 2.5v; l = 3.3h; ll mode) output current (ma) efficiency (%) 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 v in = 2.7v v in = 4.2v v in = 3.6v v in = 5.0v dc regulation (v in = 3.3v to 5.5v; v out = 2.5v; l = 3.3h; ll mode) output current (ma) output error (%) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 0.1 1 10 100 1000 efficiency vs. load (v out = 3.3v; l = 4.7h; ll mode) output current (ma) efficiency (%) 30 40 50 60 70 80 90 100 0.1 1 10 100 100 0 v in = 3.6v v in = 4.2v v in = 5.0v dc regulation (v in = 5.0v; v out = 3.3v; l = 4.7h; ll mode) output current (ma) output error (%) -1.00 -0.75 -0.50 -0.25 0.00 0.25 0.50 0.75 1.00 0.1 1 10 100 1000
electrical characteristics aat2513 dual 600ma step-down converter with synchronization 6 2513.2007.04.1.1 output voltage error vs. temperature (v out = 2.5v; i out = 600ma) temperature ( c) output voltage error (%) 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -40 -20 0 20 40 60 80 100 12 0 v in = 3.6v v in = 4.2v no load quiescent current vs. input voltage input voltage (v) input current (a) 45 50 55 60 65 70 2.5 3 3.5 4 4.5 5 5.5 6 25c 85c 40c switching frequency vs. temperature temperature ( c) switching frequency (mhz) 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 -40 -20 0 20 40 60 80 100 120 v in = 4.2v v in = 3.6v switching frequency vs. input voltage (i out = 600ma; 25c) input voltage (v) frequency variation (%) -4 -3 -2 -1 0 1 2 3 4 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 v in = 2.5v v out = 1.8v v out = 1.5v v in = 3.3v efficiency vs. load (v out = 1.5v; l = 2.2h; ll mode) output current (ma) efficiency (%) 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 v in = 2.7v v in = 4.2v v in = 3.6v dc regulation (v out = 1.5v; l = 2.2h; ll mode) output current (ma) output error (%) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 0.1 1 10 100 1000 v in = 3.3v v in = 4.2v v in = 5.0v
electrical characteristics aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 7 load transient (1ma to 450ma; v in = 3.6v; v out = 1.8v; c out = 4.7f) time (20s/div) output voltage (top) (v) load current (middle) (a) inductor current (bottom) (a) 1.8 2.0 0 0.5 450ma 1ma load transient (1ma to 450ma; v in = 3.6v; v out = 1.8v; c out = 10f; c ff = 100pf) time (20s/div) output voltage (ac) (top) (v) load current (middle) (a) inductor current (bottom) (a) 1.6 1.8 2.0 -0.5 0.0 0.5 1ma 450ma v il vs. input voltage input voltage (v) v il (mv) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6. 0 25c 85c 40c soft start (v in = 3.6v; v out = 1.8v; i out = 600ma) time (50s/div) enable voltage (top) (v) output voltage (middle) (v) inductor current (bottom) (a) 0 1 2 3 4 -0.2 0.0 0.2 0.4 0.6 p-channel r ds(on) vs. input voltage input voltage (v) r ds(on) (m ) 300 400 500 600 700 800 900 1000 2.5 3 3.5 4 4.5 5 5.5 6 120 c 25 c 100 c 85 c v ih vs. input voltage input voltage (v) v ih (v) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6. 0 25c 85c 40c
electrical characteristics aat2513 dual 600ma step-down converter with synchronization 8 2513.2007.04.1.1 line transient (v in = 3.6v to 4.2v; v out = 1.8v; i out = 600ma; c out = 4.7f) time (40s/div) input voltage (top) (v) output voltage (bottom) (v) 1 2 3 4 5 1.74 1.76 1.78 1.80 1.82 1.84 load transient (450ma to 600ma; v in = 3.6v; v out = 1.8v; c out = 4.7f) time (20s/div) output voltage (top) (v) load current (middle) (a) inductor current (bottom) (a) 1.6 1.8 2.0 0.2 0.4 0.6 450ma 600ma load transient (450ma to 600ma; v in = 3.6v; v out = 1.8v; c out = 10f; c ff = 100p f time (20s/div) output voltage (ac) (top) (v) load current (middle) (a) output current (bottom) (a) 1.7 1.8 1.9 2.0 0.2 0.4 0.6 600ma 450ma load transient (5ma to 600ma; v in = 3.6v; v out = 1.8v; c out = 4.7f) time (40s/div) output voltage (top) (v) load current (middle) (a) inductor current (bottom) (a) 1.3 1.8 2.3 2.8 -0.5 0.0 0.5 1.0 5ma 600ma load transient (1ma to 600ma; v in = 3.6v; v out = 1.8v; c out = 10f; c ff = 100pf) time (40s/div) output voltage (top) (v) load current (middle) (a) inductor current (bottom) (a) 1.6 1.8 2.0 0 0.5 600ma 1ma
electrical characteristics aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 9 input ripple (c in = 2 x 10f; v in = 3.6v; v out1 = 1.8v; v out2 = 2.5v; i out1,2 = 600ma; 0 phase shift; ps = low) time (0.2s/div) input voltage (top) (v) switching voltage lx1,lx2 (v) 3.59 3.60 3.61 3.62 -2 0 2 4 lx1 lx2 input ripple (c in = 2 x 10f; v in = 3.6v; v out1 = 1.8v; v out2 = 2.5v; i out1,2 = 600ma; 180 phase shift) time (0.2s/div) input voltage (top) (v) switching voltage lx1,lx2 (v) 3.59 3.60 3.61 -2 0 2 4 lx1 lx2 output voltage ripple (v out = 1.8v; v in = 3.6v; load = 1ma) time (10s/div) output voltage (top) (v) inductor current (bottom) (a) 1.75 1.80 1.85 -0.1 0.0 0.1 0.2 output voltage ripple (v out = 1.8v; v in = 3.6v; load = 600ma) time (0.2s/div) output voltage (top) (v) inductor current (bottom) (a) 1.78 1.80 1.82 0.4 0.5 0.6 0.7 line regulation (v out = 1.8v; l = 2.2h) input voltage (v) accuracy (%) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 i out = 400ma i out = 0.1ma to 100ma line regulation (v out = 1.5v; l = 2.2h) input voltage (v) accuracy (%) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 i out = 400ma i out = 0.1ma to 100ma
aat2513 dual 600ma step-down converter with synchronization 10 2513.2007.04.1.1 functional description the aat2513 is a peak current mode pulse width modulated (pwm) converter with internal compen- sation. each channel has independent input, enable, feedback, and ground pins with a 1.7mhz clock. both converters operate in either a fixed fre- quency (pwm) mode or a more efficient light load (ll) mode. a phase shift pin programs the convert- ers to operate in phase or 180 out of phase. the converter can also be synchronized to an external clock during pwm operation. the input voltage range is 2.7v to 5.5v. an exter- nal resistive divider as shown in figure 1 programs the output voltage up to the input voltage. the con- verter mosfet power stage is sized for 600ma load capability with up to 96% efficiency. light load efficiency is up to 90% at a 1ma load. soft start / enable the aat2513 soft start control prevents output volt- age overshoot and limits inrush current when either the input power or the enable input is applied. when pulled low, the enable input forces the con- verter into a low power non-switching state with a bias current of less than 1a. low dropout operation for conditions where the input voltage drops to the output voltage level, the converter duty cycle increases to 100%. as the converter approaches the 100% duty cycle, the minimum off time initially forces the high side on time to exceed the 1.7mhz clock cycle and reduce the effective switching fre- quency. once the input drops below the level where the converter can regulate the output, the high side p-channel mosfet is enabled continu- ously for 100% duty cycle. at 100% duty cycle the output voltage tracks the input voltage minus the i*r drop of the high side p-channel mosfet. functional block diagram en1 lx1 dh dl pgnd1 vin1 fb1 en2 lx2 dh dl pgnd2 comp . control logic control logic vin2 fb agnd voltage reference voltage reference comp oscillator ps mode/sync vcc logic logic err. amp. err. amp.
aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 11 figure 1: aat2513 typical schematic. low supply uvlo under-voltage lockout (uvlo) guarantees suffi- cient v in bias and proper operation of all internal circuitry prior to activation. fault protection for overload conditions, the peak inductor current is limited. thermal protection disables the convert- er when the internal dissipation or ambient temper- ature becomes excessive. the over-temperature threshold for the junction temperature is 140c with 15c of hysteresis. pwm/ll operation for fixed frequency, with minimum ripple under light load conditions, the mode/sync pin should be tied to a logic high. for more efficient operation under light load conditions the mode/sync pin should be tied to a logic low level. clock phase and frequency a logic high on the ps pin while in pwm mode forces both converters to operate 180 out of phase thus reducing the input ripple by roughly half. a logic low on the ps pin synchronizes both convert- ers in phase. applications information inductor selection the step down converter uses peak current mode control with slope compensation to maintain stability for duty cycles greater than 50%. the output induc- tor value must be selected so the inductor current down slope meets the internal slope compensation requirements. the internal slope compensation for the adjustable and low voltage fixed versions of the aat2513 is 0.6a/sec. this equates to a slope com- pensation that is 75% of the inductor current down slope for a 1.8v output and 2.2h inductor. in this case a standard 3.3h value is selected. 2.2uh l1 4.7f c1 1.8v 118k r1 2.2h l2 2.5v r4 59.0k r2 59.0k 10f c3 v in 187k r3 fb1 4 en1 10 lx1 7 pgnd2 13 lx2 14 pgnd1 8 agnd 2 vin1 5 vin2 16 ps 1 fb2 3 en2 9 vcc 11 mode/sync 12 n/c 6 n/c 15 aat2513 u1 c2 4.7f 0.75 v o l = = 1.2 v o = 1.2 2.5v = 3.1h m 0.75v v o 0.6 s a s a s a 0.75 v o m = = = 0.6 l 0.75 1.8v 2.2h a sec
aat2513 dual 600ma step-down converter with synchronization 12 2513.2007.04.1.1 table 1 displays the suggested inductor values for the aat2513. manufacturer's specifications list both the inductor dc current rating, which is a thermal limitation, and the peak current rating, which is determined by the inductor's saturation characteristics. the inductor should not show any appreciable saturation under all normal load conditions. some inductors may meet the peak and average current ratings yet result in excessive losses due to a high dcr. always consider the losses associated with the dcr and its effect on the total converter efficiency when selecting an inductor. the 2.2uh cdrh2d11 series inductor selected from sumida has a 98m dcr and a 1.27a dc current rating. at full load the inductor dc loss is 35mw which corresponds to a 3.2% loss in effi- ciency for a 600ma, 1.8v output. input capacitor a key feature of the aat2513 is that the funda- mental switching frequency ripple at the input can be reduced by operating the two converters 180 out of phase. this reduces the input ripple by roughly half, reducing the required input capaci- tance. an x5r ceramic input capacitor as small as 1f is often sufficient. to estimate the required input capacitor size, determine the acceptable input ripple level (v pp ) and solve for c. the calcu- lated value varies with input voltage and is a maxi- mum when v in is double the output voltage. this equation provides an estimate for the input capacitor required for a single channel. the equation below solves for the input capacitor size for both channels. it makes the worst case assumption that both converters are operating at 50% duty cycle with in phase synchronization. because the aat2513 channels will generally operate at different duty cycles the actual ripple will vary and be less than the ripple (v pp ) used to solve for the input capacitor in the above equation. always examine the ceramic capacitor dc voltage coefficient characteristics when selecting the prop- er value. for example, the capacitance of a 10f 6.3v x5r ceramic capacitor with 5v dc applied is actually about 6f. the maximum input capacitor rms current is: the input capacitor rms ripple current varies with the input and output voltage and will always be less than or equal to half of the total dc load current of both converters combined. table 1: inductor values. configuration output voltage inductor slope compensation 0.6v adjustable 0.6v-2.0v 2.2h with external 2.5v 3.3h 0.6a/s resistive divider 3.3v 4.7h i o1(max) + i o2(max) rms(max) i 2 = ?? i rms i o1 1 - + i o2 1 - ?? v o1 v in v o1 v in ?? ?? v o2 v in v o2 v in ?? ?? ?? ?? c in = 1 - esr 4 f s v pp i o1 + i o2 1 - v o v in c in = v o v in - esr f s v pp i o
this equation also makes the worst-case assump- tion that both converters are operating at 50% duty cycle synchronized. the term appears in both the input voltage ripple and input capacitor rms current equations. it is at maximum when v o is twice v in . this is why the input voltage ripple and the input capacitor rms current ripple are a maximum at 50% duty cycle. the input capacitor provides a low impedance loop for the edges of pulsed current drawn by the aat2513. low esr/esl x7r and x5r ceramic capacitors are ideal for this function. to minimize the stray inductance, the capacitor should be placed as close as possible to the ic. this keeps the high frequency content of the input current localized, minimizing emi and input voltage ripple. the proper placement of the input capacitor (c3 and c9) can be seen in the evaluation board layout in figures 3 and 4. since decoupling must be as close to the input pins as possible it is necessary to use two decoupling capacitors, one for each converter. a laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. the induc- tance of these wires along with the low esr ceram- ic input capacitor can create a high q network that may effect the converter performance. this problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. errors in the loop phase and gain measurements can also result. since the inductance of a short printed circuit board trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. in applications where the input power source lead inductance cannot be reduced to a level that does not effect the converter performance, a high esr tantalum or aluminum electrolytic (c10 of figure 2) should be placed in parallel with the low esr, esl bypass ceramic. this dampens the high q network and stabilizes the system. output capacitor the output capacitor limits the output ripple and provides holdup during large load transitions. a 4.7f to 10f x5r or x7r ceramic capacitor typi- cally provides sufficient bulk capacitance to stabi- lize the output during large load transitions and has the esr and esl characteristics necessary for low output ripple. the output voltage droop due to a load transient is dominated by the capacitance of the ceramic out- put capacitor. during a step increase in load cur- rent the ceramic output capacitor alone supplies the load current until the loop responds. as the loop responds the inductor current increases to match the load current demand. this typically takes two to three switching cycles and can be estimated by: once the average inductor current increases to the dc load level, the output voltage recovers. the above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. the internal voltage loop compensation also limits the minimum output capacitor value to 4.7f. this is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. increased output capacitance will reduce the crossover frequency with greater phase margin. the maximum output capacitor rms ripple current is given by: dissipation due to the rms current in the ceramic output capacitor esr is typically minimal, resulting in less than a few degrees rise in hot spot temperature. aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 13 1 - v o v in v o v in 1 23 v out (v in(max) - v out ) rms(max) i l f v in(max) = c out = 3 i load v droop f s 1 - = d (1 - d) = 0.5 2 = 0.2 5 v o v in v o v in
aat2513 dual 600ma step-down converter with synchronization 14 2513.2007.04.1.1 adjustable output resistor selection resistors r1 through r4 of figure 1 program the out- put to regulate at a voltage higher than 0.6v. to limit the bias current required for the external feedback resistor string, the minimum suggested value for r2 and r4 is 59k . although a larger value will reduce the quiescent current, it will also increase the imped- ance of the feedback node, making it more sensitive to external noise and interference. table 2 summa- rizes the resistor values for various output voltages with r2 and r4 set to either 59k for good noise immunity or 221k for reduced no load input current. with an external feedforward capacitor (c4 and c5 of figure 2) the aat2513 delivers enhanced transient response for extreme pulsed load applications. the addition of the feedforward capacitor typically requires a larger output capacitor (c1 and c2) for stability. table 2: feedback resistor values. thermal calculations there are three types of losses associated with the aat2513 converter: switching losses, conduction losses, and quiescent current losses. the conduction losses are associated with the r ds(on) characteristics of the power output switching devices. the switching losses are dominated by the gate charge of the power output switching devices. at full load, assum- ing continuous conduction mode (ccm), a simplified form of the dual converter losses is given by: i q is the aat2513 quiescent current for one chan- nel and t sw is used to estimate the full load switch- ing losses. for the condition where channel one is in dropout at 100% duty cycle the total device dissipation reduces to: since r ds(on) , quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. given the total losses, the maximum junction tem- perature can be derived from the ja for the qfn33-12 package which is 28c/w to 50c/w minimum. r2, r4 = 59k r2, r4 = 221k v out (v) r1, r3 (k ) r1, r3 (k) 0.8 19.6 75 0.9 29.4 113 1.0 39.2 150 1.1 49.9 187 1.2 59.0 221 1.3 68.1 261 1.4 78.7 301 1.5 88.7 332 1.8 118 442 1.85 124 464 2.0 137 523 2.5 187 715 3.3 265 1000 t j(max) = p total
ja + t amb p total = i o1 2 r dson(hs) + + (t sw f i o2 + 2 i q ) v in i o2 2 (r dson(hs) v o2 + r dson(ls) [v in -v o2 ]) v in p total i o1 2 (r dson(hs) v o1 + r dson(ls) [v in -v o1 ]) v in = + + (t sw f [i o1 + i o2 ] + 2 i q ) v in i o2 2 (r dson(hs) v o2 + r dson(ls) [v in -v o2 ]) v in r1 = -1 r2 = - 1 59k = 88.5k v out v ref 1.5v 0.6v
pcb layout use the following guidelines to insure a proper layout: 1. due to the pin placement of v in for both convert- ers, proper decoupling is not possible with just one input capacitor. the input capacitors c3 and c9 should connect as closely as possible to the respective vin and gnd as shown in figure 3. 2. connect the output capacitor and inductor as closely as possible. the connection of the inductor to the lx pin should also be as short as possible. 3. the feedback trace should be separate from any power trace and connect as close as possible to the load point. sensing along a high-current load trace will degrade dc load regulation. place the external feedback resistors as close as possible to the fb pin. this prevents noise from being coupled into the high impedance feedback node. 4. keep the resistance of the trace from the load return to gnd to a minimum. this minimizes any error in dc regulation due to potential differ- ences of the internal signal ground and the power ground. 5. for good thermal coupling, pcb vias are required from the pad for the qfn paddle to the ground plane. the via diameter should be 0.3mm to 0.33mm and positioned on a 1.2 mm grid. aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 15
design example specifications v o1 2.5v @ 600ma (adjustable using 0.6v version), pulsed load i load = 300ma v o2 1.8v @ 600ma (adjustable using 0.6v version), pulsed load i load = 300ma v in 2.7v to 4.2v (3.6v nominal) f s 1.7 mhz t amb 85c 1.8v v o1 output inductor (see table 1). for sumida cdrh2d11 2.2h dcr = 98m . 2.5v v o2 output inductor (see table 1). for sumida inductor cdrh2d11 3.3h dcr = 123m . aat2513 dual 600ma step-down converter with synchronization 16 2513.2007.04.1.1 v o2 v o2 2.5 v 2.5v i2 = 1 - = 1 - = 230m a l f v in 3.3h 1.7mhz 4.2v i pk2 = i o2 + i2 = 0.4a + 0.115a = 0.515a 2 p l2 = i o2 2 dcr = 0.6a 2 123m = 44mw l1 = 1.2 v o1 = 1.2 2.5v = 3.3h s a s a v o1 v o1 2.5 v 2.5v i1 = 1 - = 1 - = 230m a l f v in 3.3h 1.7mhz 4.2v i pk1 = i o1 + i1 = 0.4a + 0.115a = 0.515a 2 p l1 = i o1 2 dcr = 0.6a 2 123m = 44mw l1 = 1.2 v o1 = 1.2 1.8v = 2.2h s a s a
1.8v output capacitor 2.5v output capacitor input capacitor input ripple v pp = 25mv. aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 17 i o1 + i o2 rms(max) i p = esr i rms 2 = 5m (0.6a) 2 = 0.8mw 2 = = 0.6arms c in = = = 10f 1 - esr 4 f s v pp i o1 + i o2 1 - 5m 4 1.7mhz 25mv 1.2a 1 23 1 2.5v (4.2v - 2.5v) 3.3h 1.7mhz 4.2v 23 rms(max) i l f v in(max) = 3 i load v droop f s 3 0.3a 0.2v 1.7mhz c out = = = 4.8f = 67marm s (v out ) (v in(max) - v out ) = p esr = esr i rms 2 = 5m (67ma) 2 = 22w 1 23 1 1.8v (4.2v - 1.8v) 2.2h 1.7mhz 4.2v 23 rms(max) i l f v in(max) = 3 i load v droop f s 3 0.3a 0.2v 1.7mhz c out = = = 4.8f = 31marm s (v out ) (v in(max) - v out ) = p esr = esr i rms 2 = 5m (31ma) 2 = 4.8w
aat2513 losses the maximum dissipation occurs at dropout where v in = 2.7v. all values assume an 85c ambient and a 120c junction temperature. figure 2: aat2513 evaluation board schematic 1 . aat2513 dual 600ma step-down converter with synchronization 18 2513.2007.04.1.1 1. for enhanced transient configuration c5, c4 = 100pf and c1, c2 = 10f. l2 c2 v o1 187k r1 l1 v o2 gnd lx2 r3 88.7k r4 59.0k r2 59.0k c5 100pf c4 100pf c1 lx1 v in c7 1f c6 1f c8 0.1f ps 1 vin2 16 lx2 14 en2 9 en1 10 pgnd2 13 agnd 2 mode/sync 12 vcc 11 vin1 5 fb1 4 fb2 3 lx1 7 pgnd1 8 n/c 15 n/c 6 aat2513 u1 c9 10f c3 10f r5 10 v in v in v cc v cc v in gnd gnd gnd gnd l1, l2 cdrh2d11 c1, c2 4.7f 10v 0805 x5r 1 2 3 phase shift 1 2 3 sync 1 2 3 enable 1 1 2 3 enable 2 c10 120f t j(max) = t amb +
ja p loss = 85 c + (28 c/w) 533mw = 100 c t j(max) = t amb +
ja p loss = 85 c + (50 c/w) 533mw = 111 c p total + (t sw f i o2 + 2 i q ) v in i o1 2 (r dson(hs) v o1 + r dson(ls) (v in -v o1 )) + i o2 2 (r dson(hs) v o2 + r dson(ls) (v in -v o2 )) v in = = + (5ns 1.7mhz 0.6a + 60a) 2.7v = 533mw 0.6 2 (0.725 2.5v + 0.7 (2.7v - 2.5v)) + 0.6 2 (0.725 1.8v + 0.7 (2.7v - 1.8v)) 2.7v
table 5: evaluation board component values. figure 3: aat2513 evaluation board figure 4: aat2513 evaluation board top side. bottom side. adjustable version (0.6v device) r2, r4 = 59k r2, r4 = 221k 1 v out (v) r1, r3 (k) r1, r3 (k) l1, l2 (h) 0.8 19.6 75.0 1.0 - 1.5 0.9 29.4 113 1.0 - 1.5 1.0 39.2 150 1.0 - 1.5 1.1 49.9 187 1.0 - 1.5 1.2 59.0 221 1.0 - 1.5 1.3 68.1 261 1.0 - 1.5 1.4 78.7 301 2.2 1.5 88.7 332 2.2 1.8 118 442 2.2 1.85 124 464 2.2 2.0 137 523 3.3 2.5 187 715 3.3 3.3 265 1000 4.7 fixed version r2, r4 not used v out (v) r1, r3 (k) l1, l2 (h) 0.6-3.3v zero 2.2 aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 19 1. for reduced quiescent current, r2 and r4 = 221k .
table 3: typical surface mount inductors. table 4: surface mount capacitors. manufacturer part number value voltage temp. co. case murata GRM219R61A475KE19 4.7f 10v x5r 0805 murata grm21br60j106ke19 10f 6.3v x5r 0805 murata grm21br60j226me39 22f 6.3v x5r 0805 part inductance max dc dcr size (mm) manufacturer number (h) current (a) ( ) lxwxh type sumida cdrh2d11 1.5 1.48 0.068 3.2x3.2x1.2 shielded sumida cdrh2d11 2.2 1.27 0.098 3.2x3.2x1.2 shielded sumida cdrh2d11 3.3 1.02 0.123 3.2x3.2x1.2 shielded sumida cdrh2d11 4.7 0.88 0.170 3.2x3.2x1.2 shielded taiyo yuden cbc2518t 1.0 1.2 0.08 2.5x1.8x1.8 wire wound chip taiyo yuden cbc2518t 2.2 1.1 0.13 2.5x1.8x1.8 wire wound chip taiyo yuden cbc2518t 4.7 0.92 0.2 2.5x1.8x1.8 wire wound chip taiyo yuden cbc2016t 2.2 0.83 0.2 2.0x1.6x1.6 wire wound chip aat2513 dual 600ma step-down converter with synchronization 20 2513.2007.04.1.1
ordering information voltage package channel 1 channel 2 marking 1 part number (tape and reel) 2 qfn33-16 0.6v 0.6v ufxyy aat2513ivn-aa-t1 aat2513 dual 600ma step-down converter with synchronization 2513.2007.04.1.1 21 1. xyy = assembly and date code. 2. sample stock is generally held on part numbers listed in bold. legend voltage code adjustable a (0.6v) 1.5 g 1.8 i 1.9 y 2.5 n 2.6 o 2.7 p 2.8 q 2.85 r 2.9 s 3.0 t 3.3 w all analogictech products are offered in pb-free packaging. the term ?pb-free? means semiconductor products that are in compliance with current rohs standards, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. for more information, please visit our website at http://www.analogictech.com/pbfree.
package information 1 qfn33-16 all dimensions in millimeters. aat2513 dual 600ma step-down converter with synchronization 22 2513.2007.04.1.1 advanced analogic technologies, inc. 830 e. arques avenue, sunnyvale, ca 94085 phone (408) 737- 4600 fax (408) 737- 4611 ? advanced analogic technologies, inc. analogictech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an analogictech product. no circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. analogictech reserves the right to make changes to their products or specifications or to discontinue any product or service with- out notice. except as provided in analogictechs terms and conditions of sale, analogictech assumes no liability whatsoever, and analogictech disclaims any express or implied war- ranty relating to the sale and/or use of analogictech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. in order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. testing and other quality control techniques are utilized to the extent analogictech deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed. analogictech and the analogictech logo are trad emarks of advanced analogic technologies incorporated. all other brand and product names appearing in this document are registered trademarks or trademarks of their respective holder s. 1. the leadless package family, which includes qfn, tqfn, dfn, tdfn and stdfn, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing process. a solder fillet at the exposed copper edge cannot be guaranteed and is not re quired to ensure a proper bottom solder connection. 3.000 0.05 pin 1 dot by marking 1.70 0.05 0.400 0.100 3 000 0 05 0 500 0 05 0.900 0.100 pin 1 identification c0 3 0.025 0.025 0 214 0 036 0 230 0 05 top view bottom view side view 1 13 5 9

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